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Prototype, debug targets ARC-based SoCs

Posted: 01 May 2001 ?? ?Print Version ?Bookmark and Share

Keywords:soc? arm processor? seecode?

Aptix Corp. and ARC Cores teamed up to configure a prototyping and verification environment for design groups creating ARC-based SoC. The package is said to enable SoC developers to prototype the full system-on-chip-ARC processor, peripherals, memory and custom logic-in near-real-time under conditions similar to those of the target application environment.

The companies have created a parallel-port module of the ARC Tangent 32bit user-configurable microprocessor core that can be connected to the Aptix System Explorer. Users will be able to test complete designs, including the software, before first silicon, the partners said.

The new package also allows the SeeCode debugger from ARC Cores unit MetaWare to work with the System Explorer as a tightly integrated tool set, according to the partners.

In the Aptix scheme of things, the host PC connects to the prototyping system over a standard IEEE-1284 bidirectional parallel port. The prototyping system will run the ARC core via the port at 25MHz, the companies claimed.

MetaWare's SeeCode debugger interfaces directly to a high-performance emulation model of the ARC processor. A software engineer can use SeeCode to debug and verify embedded software using simulated logic, emulated logic or real silicon components, eliminating the need to learn multiple interfaces when using a new tool.

The Aptix open architecture enables the ARC user-configurable processor to work with other emulated blocks and standard hardware modules, such as RAM and I/O devices.

Developers can add custom hardware by using the Aptix hardware prototyping modules. The System Explorer with support for ARC processor prototyping and verification starts at $150,000.

? Michael Santarini

EE Times





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