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Amphion launches WLAN baseband IP cores for 802.11a and HiperLAN2

Posted: 22 Jan 2002 ?? ?Print Version ?Bookmark and Share

Keywords:amphion semiconductor? amphion? wlan baseband ip cores? wlan ip cores? wireless lan ip cores?

Providing solutions for PHY implementations of IEEE 802.11a and HiperLAN2, the CS3720 transmit and CS3820 receive cores use direct-mapped DSP functionality to accomplish end-to-end WLAN baseband processing. Both cores also use block-idling and an advanced clocking scheme to conserve power.

The CS3720/CS3820 cores require no PHY software programming, enabling DSP and GPP instructions to be applied to other value-added functions. This reduces co-design complexity and verification efforts. The cores also provide PHY layer functionality for WLAN systems, and spectrum and transmit power management.

The 5GHz WLAN devices are offered in 180nm, 150nm and 130nm CMOS designs. Together, the cores use <500,000 gates, enabling OEMs to reduce design and manufacturing costs for WLAN client and access point products.





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