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TransDimension USB controllers geared for industrial, mobile apps

Posted: 04 Feb 2002 ?? ?Print Version ?Bookmark and Share

Keywords:transdimension? controller ic? usb controller? usb host controller? embedded usb host?

The UHC124 embedded USB-host controller chip processes up to 16 USB-transactions, achieves transfer rates of 1.5Mbps and 12Mbps, and supports all four types of USB-transfers (control, bulk, interrupt and isochronous) with a maximum packet size of 1,023 bytes.

The 3.3V controller is designed for industrial as well as for automotive operating temperature ranges, and is able to support all existing USB-stacks for embedded OS.

The UHC124 supports in-place processing in the data memory and peer-to-peer-data transfers between USB-devices. It also features a root hub with four downstream ports and integrated analog transceivers.

The 64-pin LQFP device has an 8-bit microprocessor that can be interfaced to any CISC or RISC microprocessor, microcontroller or DSP. It also features a hardware generated-SOF, 2KB data memory, double/circular buffering, as well as power management with host suspend, remote wakeup, and power saving modes.

The UHC124 is also available as a USB IP Core (UHC124 IP) for SOC-integration.

The company has also released the OTG243a combination of a standard USB-Host Controller and an "On-the-Go" Dual-Role device controller. The On-the-Go standard is a supplement to the USB 2.0 specification that allows direct communication between mobile and peripheral devices via USB.

Claimed to have a faster workthrough, the OTG243 only lists active endpoint descriptors (ED) and transfer descriptors (TD) instead of the whole bulk list. An internal buffer is also present to eliminate the need to repeatedly read data packets during connection retries.

For isochronous data transfers, the OTG243 uses loose-timing and mega-buffering techniques to ensure quality of transmission in the event of bus errors or delays in OS scheduling. The company further claims that the chip requires less frequent access to the system bus and can withstand interrupts during isochronous transfers without affecting data delivery.

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