Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
?
EE Times-Asia > EDA/IP
?
?
EDA/IP??

Technologist backs low-voltage CMOS for SoC devices

Posted: 06 Feb 2002 ?? ?Print Version ?Bookmark and Share

Keywords:texas instruments? cmos? soc? rf? international solid-state circuits conference?

In a surprising turn, plenary speaker Dennis Buss, technology vice president of Texas Instruments Inc., told thousands gathered for the International Solid-State Circuits Conference that low-voltage CMOS offered the best hope for building portable Internet appliances, and that problematic analog and RF circuitry could be "re-architected" for compatibility with CMOS processes.

Buss' well-reasoned assertions, while appealing to the widest number of engineers and technologists, contrasted sharply with his earlier statements that low-voltage CMOS has run out of gas.

In his presentation Monday (Feb. 4), Buss affirmed that the economics of system-on-chip integration point to low-voltage CMOS processes, and it is therefore incumbent on those attempting to integrate outboard devices on-chip to find ways of using CMOS with a minimal amount of additional masking steps.

Integrating a 50mm2 processor with a 50mm2 embedded memory will not only increase the number of masking steps from 26 to 32, it will also decrease yields and raise test costs. Thus, embedded memory is not a good candidate for SoC integration at this time, Buss said. Even so, there are still plenty of analog and high-voltage circuits that could be re-architected for CMOS with minimal process complexities.

Buss' primary example of a portable Internet access device was a 2.5/3G cellular telephone; other examples include MP3 music players and, in the future, wearable computers. While the baseband processors of such devices are invariably digital CMOS, other parts of the system such as the RF transceivers, RF and voice codecs, and power management devices, seem to involve other processes such as analog CMOS, BiCMOS and SiGe.

An intelligent re-architecture would allow sigma-delta codecs, for example, to utilize a mixed-signal CMOS process, and would allow RF circuits to utilize BiCMOS with SiGe as the bipolar implant, Buss said.

Low-voltage CMOS typically results in a loss of headroom, and analog technologists must contend with poor on-chip matching of MOSFETs, capacitors and resistors, Buss said. "Work around these with circuit innovations," he said.

Oversampling has already overcome analog limitations for high-resolution data converters, Buss said. There must be innovative circuit architectures for low-voltage architectures, and it's up to designers to find them, he said.

Polysilicon resistor implants and isolation barriers, for example, could be fabricated on-chip with fewer masking steps that are ordinarily required for dual-gate CMOS devices, Buss said. While high-Q inductors would a problem, many capacitor values could be implemented on-chip in CMOS with high-k dielectrics.

"More controversial is a digital architecture for radios," Buss said, referring to UC Berkeley professor Bob Brodersen's contention Sunday (Feb. 3) that a software radio architecture was a bad idea. A power-intelligent digitally-controlled radio architecture could be implemented in CMOS with sampled data techniques and with digitally-controlled tuning capacitors, Buss argued.

Even power management could be implemented in CMOS, Buss said. One technique would require engineers to apply distributed power management to multiple on-chip locations. This would lower the voltage requirement of the regulator circuits. Another technique would cascade CMOS transistors to lower their breakdown voltage requirements, and generate multiple supply rails.

"We should look for architectures specifically geared to CMOS," Buss said, imploring his ISSCC audience to look for digital architectures that could perform analog functions in previously unforeseen ways.

Buss concluded that there is both good news and bad news to the speculation that Moore's Law will yield diminishing returns toward the end of this decade: The bad news is that Moore's Law could run out of gas. The good news is that there is still five-to-ten years left to work wonders in CMOS.

Stephan Ohr

EE Times





Article Comments - Technologist backs low-voltage CMOS ...
Comments:??
*? You can enter [0] more charecters.
*Verify code:
?
?
Webinars

Seminars

Visit Asia Webinars to learn about the latest in technology and get practical design tips.

?
?
Back to Top