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Party's over for low-voltage CMOS, academics say

Posted: 07 Feb 2002 ?? ?Print Version ?Bookmark and Share

Keywords:cmos? solid-state circuits conference? isscc? cmos? transistor?

Even before the curtain rose Monday (Feb. 4) on the International Solid-State Circuits Conference (ISSCC), experts were mulling the consequences of scaling CMOS for low-voltage circuitryand the news was not good.

The technique of shrinking CMOS transistors and lowering their operating voltages in order to pack them tighter and clock them faster is apparently running out of gas. That theme that is likely to be repeated throughout this week's ISSCC.

Low-voltage scaling has always been considered an anathema in terms of analog circuit performance. But even digital experts are recognizing that both leakage and drive currents rise at lower voltages, converting big chips into noisy power hogs in portable systems. Without new materials or specialized circuit techniques, CMOS scaling is exhibiting diminishing returns. "I'm here to tell you, the party's over!" said Dennis Buss, technology vice president at Texas Instruments Inc., who delivered the Monday morning plenary address at ISSCC.

In a Sunday presentation sarcastically titled, "When MOSFET switches become MOSFET dimmers," Buss said the belief that CMOS switch transistors turn on and off is a myth. They are never completely "off," which means they leak, and at lower voltages, higher currents are required to turn them "on." For a given channel length, the current consumption of a 90nm, 1.2V circuit is nearly two orders of magnitude higher than for a 250nm, 2.5V circuit. The use of high-k dielectrics offers some promise for the future, though, since it allows higher drive current, Buss said.

Sunday night's paper session, "Low-Voltage Design for Portable Systems"a new prelude to the formal opening of ISSCCoffered a series of math-laden presentations examining the effects of low-voltage scaling on MOSFET switches and RF circuits, as well as large digital processors. Despite the rigorous algebraic formulas used to make points, the presenter's messages were emphatic: low voltage is an ugly problem.

"In terms of dynamic range, low-voltage scaling buys you nothing," insisted professor Asad Abidi of the University of California at Los Angeles during the session. Not only does dynamic range suffer, but also the noise floor rises. Circuits designed to ensure the sound operation of RF amplifiers, filters, mixers, and oscillators depend on circuit techniques that operate best with long-channel, thick-oxide devices. These transistor operate best at 2.5V or higher, Abidi inferred.

Widely touted receiver architectures, like direct-conversion zero-IF schemes, can barely overcome 1/f noise at RF frequencies with low-voltage supplies, and do not meet GPS specifications, Abidi said. A better receiver architecture was dual-stage indirect downstage converterbut such a scheme depends more on traditional filter architectures which need supply voltages higher than 1.8, he pointed out. It is likely that the portable RF devices of the future will reflect mixed analog-digital architectures, some employing low-voltage CMOS, others using long-channel devices, he conceded.

Other speakers in the evening session, concentrating on the effects of low-voltage on digital circuits, offered conciliatory messages about the consequences. Bob Brodersen, the University of California professor who leads the Berkeley Wireless Research Center, pointed out that dedicated function architectures using large amounts of parallelism offered the highest efficiencyin terms of millions of operations per second (Mops) per milliwattper unit area of silicon. His thesis was based on an examination of the processors presented at ISSCC over the past 20 years. The software-intensive general-purpose processors with high clock rates faired the worst in terms of Mops accomplished per milliwatt, he said. DSPs with parallel math operations show a more efficient use of current and voltage, or more Mops per mW. But the most efficient semiconductor devicesthose demonstrating four orders of magnitude efficiency improvementwere dedicated processors for MPEG-2 and 802.11 decoding. Such reasoning rules against a general-purpose processorand software-intensive operationsfor portable systems. "The software radio is a really bad idea," Brodersen concluded.

But such conclusions didn't stop Shekhar Borkar, an Intel fellow, from demonstrating what his company was working on to save power consumption in big Pentium-type processors. Two techniquesmultiple supply rails and the use of body-bias techniquesdecrease leakage currents, he said. The use of body bias will appear in several Intel-authored papers this week.

Stephan Ohr

EE Times





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