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Commercial drumbeat resonates at ISSCC

Posted: 12 Feb 2002 ?? ?Print Version ?Bookmark and Share

Keywords:solid-state circuits? cmos? isscc? data converter? image sensor?

Even as technologists dazzled the International Solid-State Circuits Conference with presentations claiming to blow past worries about the future of CMOS, many of the engineers who gathered here last week seemed more preoccupied with the commercial viability of those advances than their technical bravura.

With IC industry sales down 32 percent last year from 2000, many ISSCC presentations were evaluated not just for the technology they demonstrated, but also in light of how fast they could get to market and what their impact on it might be.

Among the more stellar presentations, Intel Corp. drew standing-room audiences with its 291 million-transistor McKinley processor, a variation on the company's Itanium architecture. Engineers from Compaq Computer Corp. converted their superscalar Alpha processor into an 8-bit parallel machine. Memory makers Samsung Electronics and Toshiba Corp. tipped 1Gb Flash implementations. Meanwhile, data converters pushed out the resolution and speed envelope, image sensors took on 3 megapixels and radio chips claimed 200GHz fTs.

The issue of body bias control, Intel managers acknowledged before the conference, was more forward-looking than the McKinley presentation. Active forward bias of the substrate-to-transistor junction lowers the turn-on threshold for MOS transistors, a technique that can increase transistor performance while decreasing power consumption as much as 23 percent at low voltages and raising yields for otherwise marginal devices.

Intel used the bias technique in processor-core elements, taking an arithmetic logic unit and 32-bit integer execution unit to 6.5 and 5 GHz, respectively. But the company acknowledged that commercial implementation of these techniques in an entire processor was at least three or four years out.

Closer in, the 1Gb Flash designs described by Toshiba and Samsung would support 256MB of storage in a typical memory card for digital still cameras or portable audio systems. Neither company would say when commercial production would begin. Both designs were built in 0.135m CMOS, which is now coming into widespread use for memory manufacturing.

Comm buffer

Samsung also bolstered nonvolatile memory technology with a ferroelectric RAM packing an address-transition detector, which allows its use in SRAM slots. While no commercial release data was announced here, either, engineers could envision the applications in communications buffering.

Indeed, fast memory is now driven by graphics and networking applications, said Samsung's chief executive officer, C.G. Hwang, who delivered one of the opening-day plenary addresses. Though computer mainframes and servers are the largest drivers of DRAM density?projected to hit 16 Gbits before the end of this decade?cell phones and PDAs foster the development of low-power memory devices, Hwang said.

Also in communications, Broadcom Corp. engineers described 0.185m CMOS transmitter and receiver ICs for OC-192 SONET systems operating at 10Gbps. Other chip makers have turned to bipolar process technologies for such circuits, to avoid the noise traversing CMOS' noninsulating silicon substrate. But CMOS enables smaller footprints and higher levels of integration, Broadcom said

Presenter Michael Green, a former Broadcom designer who now teaches at the University of California at Irvine, told his audience that CMOS would make it possible to integrate the transmitter and receiver into a single-chip?reducing cost and chip count for telecom systems builders.

Wireless rings bells

One eyebrow-raiser was the session on wireless network interface devices, totally dominated by new Bluetooth transceivers?including some fashioned in vanilla CMOS. Ericsson Microelectronics and STMicroelectronics, for example, presented a jointly developed Bluetooth radio in 0.185m CMOS. Transilica used 0.255m CMOS for its two-chip Bluetooth transceiver multichip module.

Another device, jointly presented by National Semiconductor Corp. and Silicon Wave, uses a 0.355m BiCMOS process?as does the part shown by Hitachi's Central Research Labs.

In his opening-day plenary address, Texas Instruments Inc. vice president Dennis Buss said CMOS scaling could re-enable previously abandoned data converter architectures like Flash, which utilizes hundreds of parallel comparators, to obtain megahertz conversion rates. While TI's actual paper on a CMOS Flash converter broke no records with its 6-bit resolution or 22MHz conversion speed, it did get lots of credit for its low power consumption of 4805W. The device is intended for wireless data communications, TI said.

More attention-getting was a 0.7V sigma-delta voice codec for cell phones, a joint development of Infineon Technologies and the Technical University of Munich. This device, fabricated in 0.185m CMOS, challenges analog authorities who whined throughout the conference that the move to lower voltages cripples dynamic range and headroom. Compensation is applied using outboard capacitors rather than a voltage boost.

The codec obtains a 67dB signal-to-noise-and-distortion ratio and a 75dB dynamic range. That's almost good enough to record music on your cell phone.

Additional low-power sigma-delta ADCs were shown by Analog Devices Inc. and Philips. The ADI part is an intermediate-frequency processor for superheterodyne radio receivers. It has a 333kHz bandwidth, a 90dB dynamic range and consumes 50mW at full tilt. The Philips part, geared to UMTS applications, has a 2MHz bandwidth, a 70dB dynamic range and consumes 3.3mW of power.

TI and Analog Devices, which took opposite positions on the utility of low-voltage CMOS, also seemed to compete in commercial part introductions. TI presented a 1.1V, 2705A disposable hearing-aid chip?a dynamic-range compressor and amplifier jointly developed with New Jersey-based Songbird Hearing?a week after KRON-TV promoted the concept, if not the chip, on San Francisco television.

And Analog Devices, whose most vocal technologists decried the uses to which fine-geometry CMOS was being applied, showed an innovative ADSL line driver circuit?one that improves central office channel densities by raising efficiency and decreasing power consumption.

? Stephan Ohr

EE Times

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