Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
?
EE Times-Asia > EDA/IP
?
?
EDA/IP??

NEC IP core targeted for system LSI Chips

Posted: 13 Feb 2002 ?? ?Print Version ?Bookmark and Share

Keywords:nec? ip core? lsi chip? isscc? system lsi ip?

NEC announced at the recently concluded International Solid-State Circuit Conference the development of a super-fast serial interface IP core for system LSI chips used in next-generation broadband networks and high-end servers.

The new IP core enables data transmission of 5Gbps between LSI chips or equipment employing LSI chips. This rate can be further improved using multiple IP cores simultaneously.

The company claims that the new IP core doubles the performance of network equipment, while occupying only two-thirds the space of other IP cores.

The new core uses a new signal-receiver technology that eliminates a hold-stage circuit from temporarily retaining the input signals and lowering the operational speed of the entire input circuits.

It also uses a data transmission time aligning technology that freely extracts and adds a part of data in transmission. This also aligns the arrival time of data between cables and has expanded the loading capacity of an IP core in a single system LSI chip to >20 units.

High-speed data transmission between LSI chips is essential to improve the performance of high-speed computer servers and network equipment. NEC plans to commercialize the IP core for cell-based ICs and ASSPs in the second half of the fiscal year ending March 2003.





Article Comments - NEC IP core targeted for system LSI ...
Comments:??
*? You can enter [0] more charecters.
*Verify code:
?
?
Webinars

Seminars

Visit Asia Webinars to learn about the latest in technology and get practical design tips.

?
?
Back to Top