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Amphion MPEG-2 demux, decoders target next-gen digital video

Posted: 15 Feb 2002 ?? ?Print Version ?Bookmark and Share

Keywords:amphion semiconductors? amphion? mpeg 2 demultiplexer? mpeg 2 decoder? mpeg 2?

Amphion has announced the availability of MPEG-2 transport stream demultiplexing and multi-stream decoders for next-generation digital video ASICs and SoCs.

The CS6804 multi-source MPEG-2 demultiplexer can simultaneously handle four transport stream inputs from independent sources, with up to four video and four audio packetized elementary streams (PES) per input source.

It can send one MPEG-4 and two MPEG-2 video streams through PES parsers and into video decoders for display. The demultiplexer can also send data or audio to the host for processing. It can achieve a maximum throughput of 800Mbps with single-channel input rates up to 300Mbps.

The CS6652 and CS6654 MPEG-2 video decoders perform simultaneous decoding of up to two or four video elementary streams supporting both MP@ML and 4:2:2P@ML. The decoders comply with the ISO/IEC 13818-2 standard and can be configured to handle a single elementary stream at 4:2:2P@HL.

Optional "lite" versions are also available that decode and store only essential parameters from the MPEG-2 video stream.

"Core-based system-level integration is vital if video chip designers want to create cost-effective systems that combine all the hot interactive multimedia features wooing consumers," observed Stephen Farson, Amphion's VP for Engineering. "The decoders have a fully-integrated memory system that doesn't require host processor intervention to run," he added.

The CS6552 and CS6554 cores can process 300Mbps and can be used for next-generation picture-in-picture systems where MPEG-2 content will be within the MPEG-4 composite. In TSMC 130nm ASIC technology, the CS6554 requires 106,000 logic gates and 900mW at 133MHz.





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