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ServerWorks' core logic doubles memory of Pentium servers

Posted: 19 Feb 2002 ?? ?Print Version ?Bookmark and Share

Keywords:serverworks? core logic? intel server? pentium iii? ibm research?

Developed with IBM Research, the ServerWorks Memory eXpansion Technology (MXT) SystemI/O core logic doubles the effective memory capacity of Intel Pentium III-based servers and halves the number of DIMMs required for system operation.

The core logiccombining ServerWorks' memory and I/O controller designs, and IBM's MXT also provides reduced system power requirements and enables denser designs of 1U and blade servers. It extends support to single- and dual-processor Pentium III processors operating at speeds up to 1.26GHz and beyond.

The MXT SystemI/O technology incorporates an advanced 32MB, four-way set-associative external L3 cache implemented using 200MHz DDR DRAM components. The L3 cache complements the system's physical memory by operating transparently and appearing as memory to system processors and I/O devices.

The company's North Bridge component dynamically moves blocks of code and data between the physical memory and the L3 cache by expanding these blocks to full size as it loads the cache, and compressing them as it moves data back to the physical memory.

The L3 cache's high hit rate reduces the need to access system main memory, and reduces power consumption to about 0.5W per DIMM, compared with 5W per DIMM for non-MXT systems. This also enables the use of lesser DIMM slots allowing for a more compact motherboard design and denser 1U or blade configuration.

MXT SystemI/O also features a main memory controller that delivers up to 2.1Gbps of memory bandwidth. It also supports up to eight registered PC133 DIMMs operating in a two-way interleaved manner, with capacities of 64MB to 2GB.

The design also includes an error correction code algorithm, memory-scrubbing capability and ServerWorks' enterprise IBM Chipkill technology. I/O capabilities include a mix of 64-bit/66MHz PCI channels for high-performance peripherals and 32-bit/33MHz PCI for less demanding I/O requirements.

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