Xilinx FPGAs integrate PowerPC processor

Using the company's IP Immersion technology, the Virtex-II Pro FPGAs supports up to four 300MHz PowerPC 405 processor cores and incorporates RocketIO multi-gigabit serial transceivers, as well as Active Interconnect, BlockRAM, and clock management features.

The products enable system designers to partition and repartition their systems between hardware and software at any time during the development cycle. They also provide for simultaneous debugging of the hardware and software components.

The immersion method allows hard IP cores to be diffused at any coordinate within the Virtex fabric while maintaining smooth integration with the surrounding array. The IP Immersion technology intimately couples all of the high-speed buses on the core directly to the programmable fabric for higher performance compared to an equivalent discrete processor.

The 3.25Gbps RocketIO serial interface allows integration for high-performance interface standards such as Gigabit Ethernet, 3GIO, SerialATA, InfiniBand, and Fibre Channel.

The Virtex-II Pro family includes five versions—XC2VP2, XC2VP4, XC2VP7, XC2VP20, XC2VP50—and supports up to a maximum of 16 gigabit transceivers and 852 user I/Os. They also accommodate up to 3.88Mb of RAM and 50,832 logic cells. The product also bundles A System Generator for PowerPC IDE tool for hardware and software development.

The XC2VP4, XC2VP7, and XC2VP20 devices are priced at $120, $180, and $525, respectively for 25,000 units.