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LSI Logic introduces 10Gb core solution for network apps

Posted: 08 Mar 2002 ?? ?Print Version ?Bookmark and Share

Keywords:lsi logic? ip core? core? asic? soc?

The company announced the release of the System Packet Interface Level 4 (SPI-4) Phase 2 IP core, allowing designers to design their ASICs with verified interoperability, significantly simplifying interface design and reducing time-to-market of high-speed networking applications.

A member of the CoreWare library, the SPI-4 Phase 2 core can be used to upgrade to paths that incorporate new and evolving technologies into existing networks. The core operates up to 800MHz and allows the implementation of a 12.8Gbps throughput on the system bus. It satisfies the requirements of 10Gb Ethernet, OC-192 SONET and Packet-over-SONET.

The CoreWare design program provides a complete set of deliverables to ensure successful integration of IP building blocks into complex ASICs or SoC designs.

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