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Synopsys, ST deal to enable reduced SOC-test costs

Posted: 12 Mar 2002 ?? ?Print Version ?Bookmark and Share

Keywords:synopsys? stmicroelectronics? design automation? soc?

Synopsys Inc. has announced a two-year partnership agreement with STMicroelectronics at the Design Automation and Test in Europe to create new methodologies and technologies to reduce manufacturing test development cost and effort while simultaneously improving test quality.

The alliance will develop and deploy advanced manufacturing test solutions innovated by Synopsys and ST that are anticipated to solve test challenges at reduced costs, and provide turnaround time and time-to-market advantages for complex SoC devices.

The companies aim to optimize ST's design-to-manufacturing test flows to greatly improve turnaround time and time to market; and to enable ST to dramatically reduce its manufacturing test costs.





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