Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > EDA/IP

'Divide and conquer' with hierarchical design

Posted: 16 Mar 2002 ?? ?Print Version ?Bookmark and Share


This technical article describes how physical synthesis alone could not present a complete solution to the challenges of advanced chip design. Therefore, as an alternative, designs must be subdivided into manageable blocks.

View the PDF document for more information.

Article Comments - 'Divide and conquer' with hierarchic...
*? You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.

Back to Top