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Technical program assembled for upcoming DAC

Posted: 04 Apr 2002 ?? ?Print Version ?Bookmark and Share

Keywords:Design Automation Conference? DAC? seminar? embedded processors? memory management?

Hoping to convince designers that this year's Design Automation Conference (DAC) is worth the trek to New Orleans, the show's committees have announced an innovative technical program. New features for the conference, to be held June 10 to 14, include "hands-on" tutorials, a full-day tutorial on embedded systems, and an "introduction to EDA" workshop.

The 2002 39th Design Automation Conference will include two keynote speakers, more than 160 papers, over 225 exhibitors, demo suites, and an array of panels, sessions, tutorials and workshops. Organizers are expecting over 15,000 participants.

The opening keynote address will be delivered by Hajime Sasaki, chairman of NEC Corp., titled "Paradigm in Semiconductor Design: Challenges on the CAD System." A Thursday (June 13) keynote by Jerry Fiddler, chairman of Wind River Systems Inc., is titled "Software and Silicon? Where's the Equilibrium?"

DAC will present a "Workshop on Teaching Functional Verification" on Sunday (June 9). An "Introduction to EDA Workshop" will be held Monday aimed at non-technical personnel. Also on Monday, DAC will hold an "Interoperability Workshop" to discuss the need for a standard design data model, and the annual "Workshop for Women in Design Automation" will also be held Monday.

Hands-on tutorials will focus on verification of embedded systems, and will encourage participants to work with tools in real-time. The tutorials will be limited to the first 30 people to enroll, at a cost of $40 each. Topics include bus-functional models, virtual prototypes, assertion-based validation, hardware/software integration, embedded communications systems, and hardware/software debugging for programmable systems.

The technical program includes eight panel sessions. Topics include Wall Street's evaluation of EDA, tool bottlenecks, analog intellectual property (IP), nanometer design, ASIC hand-off, unified tools for embedded systems, formal verification, and "the next EDA driver." Other sessions will include invited presentations by academics or engineers.

Twelve panel sessions and over 35 papers will focus on embedded systems design. Topics include design innovations for embedded processors, memory management, embedded software automation, network applications, timing analysis and memory optimization, scheduling techniques, and development of processors. Additionally, an Embedded Systems Showcase will be located on the exhibit floor.

Full-day tutorials include an introduction to embedded software, IP design and integration, modeling for high-frequency design, SystemC, physical chip implementation, and new computing platforms.

Advance registration for the conference is open until May 13.

? Richard Goering

EE Times





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