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AccelChip tool synthesizes Matlab designs

Posted: 04 Apr 2002 ?? ?Print Version ?Bookmark and Share

Keywords:accelfpga? synthesis tool? fpga design tool? fpga? synthesis tool?

AccelChip Inc., a startup, believes it has cracked a longstanding design problem with a new tool that creates synthesizable Verilog and VHDL code from Matlab and Simulink designs for use in Xilinx or Altera FPGAs. While Matlab and Simulink are popular simulators, there has heretofore been no easy path between them and customizable silicon, the company said.

AccelChip is a spin-off of Northwestern University, where the technology for the company's AccelFPGA synthesis tool was developed under a grant from the Defense Advanced Research Projects Agency (Darpa).

Cadence Design Systems Inc.'s Signal Processing Workshop tools provide high-level simulations for custom silicon designers, but make little accommodation for Matlab in the design flow, said Dan Ganousis, a marketing consultant for AccelChip.

Elanix Inc.'s SystemView tools will utilize Matlab to output C code for Texas Instruments Inc.'s TMS320C5000 and 'C6000 digital signal processors, but not for customizable silicon, he said. FPGAs can be hardwired and offer higher performance in many applications, Ganousis said.

AccelFPGA reads Matlab and Simulink files and outputs synthesizable VHDL and Verilog in RTL that has been optimized for an FPGA. The tool also creates simulation models for bit-true verification, eliminating the need to create test benches for DSP algorithms.

AccelChip president and CEO Prith Banerjee was chairman of the EE department at Northwestern University where he led the Darpa-funded Match (Matlab compilation environment for adaptive computing) project before founding AccelChip in 2000.

The company has an exclusive license to commercialize the project's technology, and has collected $2.3 million in funding from Arch Development Partners, the Illinois Development Finance Authority and angel investors. Revenues were over $600,000 in fiscal 2001, when it developed a custom tool based on Match technology for QuickLogic Inc.

Stephan Orr

EE Times





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