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WIZnet ASSP integrates I?C interface

Posted: 05 Apr 2002 ?? ?Print Version ?Bookmark and Share

Keywords:w3100a? tcp/ip chip? w3100? assp? asic?

WIZnet Inc. has announced the release of the W3100A TCP/IP hardwired chip that features data rates of up to 6Mbps and includes an I?C serial interface, making it possible to extend the company's i2Chip technology to a larger variety of MCUs.

An upgrade of the W3100, the W3100A extends support to TCP/IP, UDP, ICMP, DHCP, ARP, DLC, and MAC protocols. It supports four independent concurrent connections with dynamic buffer allocation for each channel.

The ASSP also features 10/100Base-T auto-detection and supports full-duplex mode transmission. It has an embedded 16Kb data buffer and a standard MII interface for under-layer physical chip.

The 64-pin LQFP device, which is being showcased at this year's IIC-China conference and exhibition, operates from a 3.3V supply and has 5V-tolerant I/Os.

South Korea's WIZnet Inc. is displaying its products at this year's International IC ? China Conference and Exhibition (IIC-China), which is being held in Shanghai until today, April 9, then moving to Beijing on April 11 and 12, and Shenzhen on April 15 and 16. IIC-China is organized by eMedia Asia Ltd, a Global Sources and CMP Media joint venture.

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