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Xilinx floats Aurora serial protocol

Posted: 17 Apr 2002 ?? ?Print Version ?Bookmark and Share

Keywords:Xilinx? networking gear? HDTV? Ethernet? TCP/IP?

Xilinx Inc. has proposed a new point-to-point serial link protocol dubbed Aurora for use in high-speed networking gear, HDTV broadcast systems, blade servers and storage subsystems.

The link layer protocol resides just above the physical layer, and works as an interface to either proprietary upper-layer protocols or industry-standard protocols like TCP/IP and Ethernet.

Intended for high-speed serial links, it can scale from 622Mbps to 3.125Gbps. As many as 16 channels can be aggregated for a baud rate of 50Gbps and a maximum data transfer rate of 40Gbps full-duplex, according to the company.

Xilinx will demonstrate the technology today (April 17) at its Programmable World 2002 conference and will submit the protocol to standards groups such as the PCI Industrial Computer Manufacturers Group.

"Our intention is to incorporate feedback and recommendations and present this as a standard," said Per Holmberg, senior product marketing manager for IP solutions at Xilinx.

Eye on backplanes

The protocol can be used for connections between chips, boards and boxes, though it's primary aim is to replace 1,000Base-T connections used in backplanes. Xilinx says that moving to a serial interface is cheaper, less power-hungry and offers more data rate options than 1,000Base-T. Using a serial interface with Aurora, "you could go to 3.125Gbps over two pairs versus four pairs and have more granularity in the bandwidth," said Kent Dahlgren, technical staff member for Xilinx's advanced product division.

As such, Aurora is not a threat to interface standards like 3GIO and Rapid I/O, which use symbol encoding in their link layer handshakes that isn't supported by Aurora. "This really targets moving IP or TPP frames or Ethernet frames between two boards," Dahlgren said. "There aren't many PHY and link layers specifically targeted for backplane applications."

Xilinx hopes the protocol will spark interest in its latest Virtex-II Pro FPGA, which sports 3.125Gbps serial links and embedded PowerPC processors. The link layer will take up about 780 to 900 logic cells and will eventually be incorporated into the company's IP core library.

? Anthony Cataldo

EE Times

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