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VSIA releases SI spec for IP-block integration

Posted: 01 May 2002 ?? ?Print Version ?Bookmark and Share

Keywords:vsia spec? signal integrity? ic design? ip blocks? analog/mixed-signal?

The Virtual Socket Interface Alliance (VSIA) has released the initial version of a signal integrity extension to the specs defined by its Analog/Mixed-Signal working group. The extension is intended to help intellectual-property (IP) suppliers communicate signal integrity data to IP integrators.

"The signal integrity concern is not just among analog IC designers, but also for digital ASIC designers working with high interconnect densities at 0.185m and below," said Raminderpal Singh of IBM Microelectronics, co-chairman of the working group and primary author of the signal integrity spec.

High interconnect densities that follow from shrinking CMOS geometries can cause signal interference between neighboring wires and often lead to unstable SoC behavior, Singh said. Moreover, smaller noise margins can produce interference between IP blocks and increase the difficulty of predicting signal integrity between connected logic blocks.

The VSIA specification consequently defines three areas in which a digital signal transfer can be corrupted by stray signals or noise. They are interconnect crosstalk, substrate coupling and signal electromigration.

"We are viewing it from the point of view of the designer who says, 'Oh! I did not realize that occurred,'" said Singh, a senior engineer at IBM's ASIC group.

Warm, fuzzy feeling

The specification was developed to meet the needs of modeling tool developers, Singh said. "You can buy complex modeling tools, but some may not work at this level," he said. "The problems are difficult to get your hands on. You want to be certain your design has low risk. Identifying some things to look for at least will bring you closer to a warm, fuzzy feeling at signoff."

VSIA said its signal integrity extensions were developed by working group members IBM, Intel, Motorola Semiconductor Products Sector and Simplex Solutions. VSIA also credited the ARM consortium, Cadence Design Systems, Mentor Graphics, Philips Semiconductors and the Special Interest Group representing Japanese interests in the VSIA.

The Analog/Mixed-Signal signal integrity study group is already looking ahead to version 2.0, Singh said. "Because of process scaling, SI is always a moving target," he said. The next document, he said, will include research into mutual inductance effects at 0.135m and 0.105m process geometries, will help map signal integrity data and data types, and will streamline the process by which new VSIA participants are incorporated into IP trades.

"In all cases, we need to hit the ground running," he said.

? Stephan Ohr

EE Times

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