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Cadence supports Accellera specification language

Posted: 03 May 2002 ?? ?Print Version ?Bookmark and Share

Keywords:Accellera? simulation? verification? EDA? HDL?

Cadence Design Systems Inc. has revealed that it is supporting the standard property specification language defined by Accellera to enable assertion-based simulation and formal verification. Cadence aims to improve design productivity through an electronic design methodology based on worldwide standards and open interfaces. Several other electronics companies and EDA companies have also expressed support for the Accellera standard including: Verplex, TransEDA, Real Intent, 0-In Design Automation, and IBM.

At the same time, the Accellera formal verification technical committee selected IBM's Sugar 2.0 language as the basis for the industry-standard language. The Sugar 2.0 language will help to improve design technology interoperability and enhance the simulation and functional verification processes. Sugar 2.0 is expected to enable designers to capture specifications, requirements, and assumptions as assertions about the hardware description language (HDL) description of a digital electronic design. These assertions can be verified through simulation or formal verification. The use of assertions can greatly accelerate detection and elimination of errors during design verification.

"Although formal verification has been a rapidly growing market, the availability of a standard property specification language will hasten its expansion even further into areas well beyond equivalence checking," said Dino Caporossi, VP of corporate marketing for Verplex Inc. "The upcoming Accellera standard, based on Sugar 2.0, will accelerate adoption of formal design validation by enabling interoperability between simulation and formal verification flows."

"Rapid finalization and adoption of the Accellera Formal Property Language standard is key to EDA tool interoperability and widespread adoption of assertion based verification." said Tom Anderson, VP applications at 0-In Design Automation. "The new Accellera Formal Property Language has the right balance of expressiveness for formal verification tools and intuitiveness for users. 0-In is committed to supporting the Accellera standard and will soon have a version of it's CheckerWare Library and Monitors which incorporate it, enabling interoperability with any tool that supports the standard."

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