PLD moves toward 300mm wafers, 0.135m process

The move towards 300mm wafers is proving to be advantageous to PLDs as compared to ASICs, said Wim Roelandts, president and CEO of Xilinx, because PLDs need bigger dies than ASICs. "This advantage will be one of the factors enabling programmable logic to be the fastest growing segment of semiconductor industry," he predicted.

With the first production of PLD on 300mm wafers expected this quarter, the consumer can expect price reduction of 25 percent.

Another important move in programmable logic is towards 0.135m processing. "Xilinx is working on this technology," said Roelandts, "along with low-k dielectric and copper interconnects. We shall move further to 0.095m technology, with the first product based on this technology due for release in mid-2003. The product is Virtex 3."

Roelandts said that using the current generation of programmable logic products "you can bring products to the market nine months earlier than using ASIC." This advantage will grow with the move towards 300mm wafer and 0.135m process.

Roelandts said that Xilinx had not laid off anyone during the recent worst downturn in the semiconductor industry. "We have a business model that is very sturdy," explained Roelandts. "Our fabless strategy and independent sales organization keeps our fixed cost low."

Most production work for Xilinx will be done in Taiwan.

In 2001, Xilinx's share in the global PLD market rose to 47 percent, from 42 percent in 2000.

Roelandts forecast that in 2003 Xilinx will grow by 25 percent to 30 percent. "This is the largest growth predicted by anyone in the semiconductor industry," he stated.

? Kirtimaya Varma and Ju-Yeun Lee

Electronic Engineering Times ? Asia