Logic offered in no-lead QFN packaging

Texas Instruments Inc., Integrated Device Technology Inc., and Hitachi Semiconductor Inc. are launching 20-, 16- and 14-pin QFN packaging for gate- and octal-bit-width logic devices for PDAs, cell phones, and other handheld consumer electronics, and for advanced networking and communications applications.

The QFN is as much as 62 percent smaller than TSSOPs in the same bit widths.

TI is making its ABT, LVC, LVTH and LV-A technologies available in QFN packages. Full production is planned to ramp in other advanced BiCMOS and CMOS technologies later this year.

"With a strong alternate-source partnership with IDT and Hitachi, we were able to introduce logic in the QFN package to give designers the real estate they need to shrink their form factors while improving performance and reliability," said David Hoover, worldwide product-marketing manager for TI's Standard Linear and Logic Group.

IDT and Hitachi both plan to release devices with QFN packaging in late 2002. In 1,000-piece quantities, TI's QFN devices range in price from 29 cents to 48 cents each.

The QFN has footprint, height and weight advantages over TSSOP packages with those pinouts, according to Hoover. The 20-pin QFN has a footprint of 15.75mm2, and all three QFN pin counts have a height of 1mm, meeting the most aggressive thickness standards for portable applications. With an exposed die pad, the QFN packages are said to offer improved thermal performance.

The die pad can also be used as a ground. According to QFN modeling data, thermal performance improved up to 55 percent over TSSOPs, and electrical performance (inductance and capacitance) improved 60 percent and up to 30 percent, respectively, over the TSSOP.

EE Times