C-MAC frequency translator exhibits -150dBc/Hz phase noise

The CFPPL-1 frequency translator from C-MAC MicroTechnology uses an internal voltage-controlled crystal oscillator and eliminates the use of external passive components for the PLL, enabling it to exhibit a phase noise of -75dBc/Hz (10kHz offset from output frequency) and -150dBc/Hz (50kHz).

The device translates an input frequency between 4kHz and 50MHz to an output between 10MHz and 155.52MHz, making it suitable for synchronizing GSM, UMTS and other cellular basestations to telecommunication network backbones such as SONET/SDH or ISDN.

The surface-mount device has a channel spur rejection of -115dBc and is also suitable as a low-noise frequency multiplier or precision clock source for communication and industrial applications.

The 22-by-25.4-by-7mm device operates from a 2.7V to 5.5V supply and draws <20mA. It integrates a synthesizer locked output and a loop control voltage output for diagnostic and built-in test applications. It has a standard operating temperature of -100C to 750C.