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A quick JTAG ISP checklist

Posted: 28 Jun 2002 ?? ?

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Keywords:xc9500/xl/xv? xc18v00? cpld? complex pld? programmable logic device?

This application note describes a short list of considerations needed for optimum performance of ISP designs. The considerations apply to Xilinx ISP device families.

View the PDF document for more information.

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Related Info

What are CPLDs?
A complex programmable logic device (CPLD) is a programmable logic device with complexity between that of PALs and FPGAs, and architectural features of both. It is made up of several simple PLDs (SPLDs) with a programmable switching matrix in between the logic blocks. CPLDs typically use EEPROM, flash memory or SRAM to hold the logic design interconnections.

A quick JTAG ISP checklist

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