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Micro Networks clock device delivers <1ps jitter

Posted: 02 Jul 2002 ?? ?Print Version ?Bookmark and Share

Keywords:micro networks? saw? communications clock device? m2004 01? frequency translator?

The M2004-01 frequency translator from Micro Networks integrates a high performance PLL with VCSO SAW technology to provide ultra-low rms jitter (<1ps) reference clocks for high-speed SONET/SDH optical and transponder applications.

The device also features two selectable reference clock inputs, serial or parallel programming of feedback and output frequency dividers, external loop filter elements, differential LVPECL outputs and 3.3V operation.

The PLL IC incorporates on-chip VCSO circuitry. The high-Q SAW filter used to provide the low jitter performance is mounted off-chip within the 9-by-9mm package. The output frequency of the device is factory set by installing a custom SAW filter of the desired frequency. The frequency translator is available at SONET/SDH and 10Gb Ethernet frequencies up to 700MHz.

The frequency translator is said to minimize design and manufacturing problems associated with low jitter clock synthesis circuits, and helps reduce overall board space and circuit complexity while providing cost savings.

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