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Flexible transceiver protects backplane investments

Posted: 11 Jul 2002 ?? ?Print Version ?Bookmark and Share

Keywords:mindspeed technologies? m27218? octal skyrail? cmos octal serdes? serdes transceiver?

A CMOS octal serdes transceiver from Mindspeed Technologies promises to facilitate seamless system upgrades from OC-12 to OC-48 or OC-192 speeds.

Offering an adaptive high-speed interface between LVDS and CML, as well as the ability to operate at OC-12 (622Mbps) and OC-48 (2.488Gbps), the M27218 Octal SkyRail is said to be one of the few transceivers that lets manufacturers protect customer investments in existing backplanes and port cards.

Optimized for add/drop MUXs, optical cross-connects, multiservice switches, routers, network aggregators and other equipment that needs an LVDS/CML interface, the Octal SkyRail features total power consumption of <2.5W at 2.488Gbps.

"With this transceiver, our customers can design upgrades to OC-48 or OC-192 that use legacy backplanes and low-speed port cards," said Elie Massabki, director of marketing for Mindspeed's broadband internetworking systems business unit.

"The transceiver can increase port density and throughput by a factor of four. Until now, there was no simple way to upgrade backplanes to handle parallel unencoded data and high-speed serial traffic along the same data path," he added

Operating at speeds from 400Mbps to 3.2Gbps, the device integrates eight serial LVDS/CML transmitters and receivers that can adapt and interface to LVDS or CML/LVPECL I/Os. It also integrates 32 parallel LVDS transmitters and receivers, selectable 4:1/1:4 and 1:1 serdes functions, clock and data recovery, synthesis circuitry, termination resistors and deskew buffers.

In addition, it offers ac- and dc-coupling capability, and can accept more than 1,000 consecutive identical digits in dc-coupled mode and more than 100 consecutive identical digits in ac-coupled mode.

Patented, third-generation signal-conditioning circuitry called Amplif-Eye3 is said to provide optimal signal integrity over standard FR-4 trace and legacy connectors through multilevel pre-emphasis on the transmitter and equalization on the receiver, as well as low jitter and 60-millivolt receiver input sensitivity.

The circuitry both optimizes and maximizes the transceiver's reach, driving >1.5m of standard FR-4 backplane trace and two connectors at 2.5Gbps.

The M27218 uses Mindspeed's Flexilink parallel LVDS interface. The Flexilink has adjustable timing to facilitate the interface of different ASICs that operate with different clocking and timing implementations, and is thus said to simplify system design.

Production is planned for the fourth quarter. The part is priced at $109 in quantities of 1,000.

EE Times

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