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Agere rolls single-chip network processor

Posted: 24 Jul 2002 ?? ?Print Version ?Bookmark and Share

Keywords:agree systems? inp5? payload plus? network processor? oc 48 network processor?

Agere Systems Inc. will announce that it has shrunk its original three-chip PayloadPlus network processors into a single device. Named the INP5, the three-in-one chip will aim its packet processor, classifier and traffic manager at full-duplex OC-48 (2.5Gbps) transmission and will be considered a continuation of the company's PayloadPlus family.

"A lot of our competitors tried to come right out of the gate with a single-chip product," said Bill Klein, product-marketing manager for Agere Systems. "We felt it was more important to get the functionality right and get the performance right and get [chips] out to the field?and then figure out how to optimize them."

The INP5 is due to sample in the fourth quarter, with volume production slated for the second quarter of 2003.

The single-chip INP5 is an important step for Agere, which produced an early front-runner in OC-48 network processing but has allowed competitors to catch up.

"Agere kind of came on strong early on, but they haven't really updated their product for three years now," said Linley Gwennap, president of The Linley Group Inc.

Moreover, the INP5 shows that Agere is expanding its market beyond ATM networks. Multiservice ATM remains a key market for Agere, Klein said, but the INP5 also targets Ethernet networks with the inclusion of on-chip Ethernet media access controllers.

"They're definitely trying to get beyond the ATM market. They probably realize they've been painted into this one corner," Gwennap said.

In addition to combining the three PayloadPlus chips, the INP5 adds some improvements. Agere's original FPP classification chip used SRAM. For the INP5, Agere is turning to the less expensive FCRAM.

The INP5 also includes 3MB of on-chip SRAM, usable for holding up to 8,000 queues, or for holding packets during classification. The SRAM allows users to avoid external memory for certain occasions, Klein said.

Separately, Agere is working on its 10Gbps network processors. Its first release, due in 2003, will be a two-piece chip set consisting of the TM10 traffic manager and the NP10 packet processor and classifier.

Later, Agere plans to release a single-chip 10Gbps network processor, the INP20. That device is in the early architectural phases, Klein said.

Craig Matsumoto

EE Times





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