Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > FPGAs/PLDs

Altera CPLD packs 512 macrocells

Posted: 29 Jul 2002 ?? ?Print Version ?Bookmark and Share

Keywords:altera? epm3512a? max 3000a? cpld? high density cpld?

The EPM3512A CPLD from Altera Corp. packs 512 macrocells in PQFP or FineLine BGA package, making it suitable for users developing wide data bus apps such as interfacing for microprocessors, peripherals, and memories.

A member of the company's 3.3V MAX 3000A product line, the EPM3512A provides 7.5ns pin-to-pin performance and frequency counter speeds of up to 115MHz. The device also expands the available I/O interfaces by 32 percent over existing MAX 3000A devices.

The CPLD is fabricated on a 0.3?m four-layer metal process and includes an enhanced in-system programmability feature set, and supports both Jam STAPL and MultiVolt I/O (2.5V, 3.3V, and 5V) operation.

Software support is provided for the company's Quartus II v2.1 and MAX+PLUS II v10.2 design softwares.

The EPM3512A device is offered in the -7 and -10 commercial speed grades.

Article Comments - Altera CPLD packs 512 macrocells
*? You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.

Back to Top