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ME Ethernet transceiver uses SOI-CMOS technology

Posted: 16 Aug 2002 ?? ?Print Version ?Bookmark and Share

Keywords:Mitsubishi electric? m69850? gigabit ethernet transceiver? ethernet phy transceiver? lan transceiver?

Mitsubishi Electric's M69850 is claimed to be world's first 10Gb Ethernet PHY transceiver that uses SOI-CMOS technology, enabling it to integrate XGMII extender sublayer (XGXS), physical coding sublayer (PCS), and physical medium attachment (PMA) functions into a 289-pin BGA package that uses a single, 1.8V power supply.

SOI-CMOS technology is claimed to provide faster transistors for better performance and less substrate noise for lower jitter level, as well as latch-up prevention. The M69850 is targeted to meet the industry demand to upgrade data transmission speed in LANs and MANs.

"SOI-CMOS technology enables customers to have a more integrated, more reliable, and more cost-effective high-speed analog solution than products using GaAs, bipolar, or BiCMOS technologies," said Daniel Chen, AVP of HF products for Mitsubishi Electric & Electronics USA Inc.

Designed for 10Gbps Ethernet optical modules, digital cross connects, network routers, and network switch applications, the M69850 is compliant with the XENPAK MSA standardization and conforms to the IEEE802.3ae standard.

The chip's XGXS, PCS, and PMA blocks incorporate a serdes PLL, clock data recovery, transmitter/receiver elastic FIFO, 8-bit to 10-bit encoder/decoder, 64-bit to 66-bit encoder/decoder, and gearbox functions.

These functions provide the data conversion between the 10.3Gb PMA and 3.125Gb XAUI interfaces. An industry-standard XAUI-PMD interface employs a differential low-voltage-swing, ac-coupled interface to reduce power consumption. The device also provides an MDIO interface to provide full IEEE802.3ae compatibility.

The M69850 provides designers with a flexible clock scheme, giving them a choice between a 156.25MHz VCO and 156.25MHz or 644.53MHz external reference clocks.

Other features include comma detection and byte alignment, deskewing and channel-to-channel alignment functions for data alignment, as well as loopback and built-in pseudo-random bit sequence pattern generator for module testing.





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