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Xilinx design tool integrates IBM bus analyzer

Posted: 27 Aug 2002 ?? ?Print Version ?Bookmark and Share

Keywords:xilinx? ibm? chipscore pro? chipscore pro v5.1i? coreconnect iba core?

Xilinx Inc. has announced that it will begin shipment next month of the ChipScore Pro v5.1i logic debug and verification tool that features IBM's CoreConnect integrated bus analyzer (IBA) cores, core insertion tools, and an analyzer interface for on-chip capture of data related to on-chip peripheral bus transactions.

The CoreConnect on-chip peripheral bus is the critical interface between the PowerPC processor and peripherals implemented with the Virtex-II Series Platform FPGAs.

The added features allow logic and system designers to monitor and view transactions and events that occur over the CoreConnect bus using the triggering capabilities in ChipScope Pro. The CoreConnect IBA core enables protocol error violation detection and reporting based on the IBM Developer's Standards for the CoreConnect bus.

In addition, the analyzer interface allows the user to view the data in a bus cycle-level display complete with time stamps.

The release of the new ChipScore Pro tool provides unprecedented access and visibility to designers for on-chip debug and verification of bus interactions between the PowerPC and peripherals with Virtex-II Pro designs, claimed Rich Sevcik, SVP of FPGA products at Xilinx.

The tool also includes the Core Inserter flow, which enables designers to identify signals and nodes that exist in a design. The flow inserts ChipScope Pro cores into the design netlist. Further, it offers the flexibility to add and remove debug cores at any time throughout the design cycle.

This new Core Inserter flow is in addition to the original core generation flow, which enabled designers to quickly and easily insert IBA bus analyzer and ILA logic analyzer cores into the HDL source for synthesis, implementation, and programming by way of the Xilinx ISE design software.

ChipScope Pro is an optional verification software that interfaces to the Xilinx ISE design flow. It supports all of the Xilinx product families, including the Virtex-II Pro platform for programmable systems on Windows 2000 and Windows XP.

The software will be offered via a 30-day web downloadable evaluation version for free, beginning September 30.

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