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Cadence, IBM partner to ease IC design process

Posted: 03 Oct 2002 ?? ?Print Version ?Bookmark and Share

Keywords:chip design? EDA software tools? microchips?

Cadence Design Systems Inc. and IBM have announced a series of agreements intended to simplify the chip design process for their customers, and at the same time help both companies tap on the latest in chip technologies.

Under the first agreement, IBM will extend its use of existing Cadence EDA software tools, and add new ones, on its design of microchips for both internal and external purposes. Under a separate agreement, Cadence will acquire IP associated with select IBM in-house EDA test tools for incorporation into the Cadence product family. This contract is expected to bring commercial design automation support to IBM's customers to help them take full advantage of its test methodology and technology, as well as making the technology more broadly available.

With a third agreement, the two companies plan to collaborate on future EDA technology to address growing chip design challenges as circuit sizes continue to shrink to 90nm and smaller nodes.

These arrangements between Cadence and IBM are intended to promote greater commonality between the tools used by IBM and its customers, while also opening up broader access to more of IBM's extensive in-house design technology.

"IBM has a unique combination of process technology, IP, EDA tools and design expertise that we are working to make more broadly available to customers," said John Kelly, SVP and Technology Group executive for IBM. "With Cadence's deep design skills and experience in broad range of applications, Cadence is a natural choice as a company to work with. We believe IBM and Cadence can collectively provide our customers with a more comprehensive set of tools and services to meet their needs."





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