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Xilinx DSP generator compatible with MathWorks Release 13

Posted: 07 Oct 2002 ?? ?Print Version ?Bookmark and Share

Keywords:xilinx? system generator for dsp? mathworks release 13? matlab 6.5? dsp generator?

Xilinx Inc. has announced that its System Generator for DSP tool v2.2 is fully-compatible with MathWorks' Release 13 product family including MATLAB 6.5 and the Simulink 5 modeling systems.

When used with the company's ISE 5.1i FPGA design suite, the System Generator also provides customers with immediate access to state-of-the-art productivity tools to develop high performance DSP systems with Xilinx Virtex-II series FPGAs.

A part of the company's XtremeDSP initiative, the company claims that the System Generator for DSP tool automatically generates an FPGA implementation from the Xilinx Blockset in Simulink 5 with performance and density levels previously attainable only through hand crafted designs.

Within the Virtex-II Pro device, the tool allows system architects and DSP designers to support such features as SRL16E shift-register logic, up to 556 18-by-18 embedded multipliers, and up to 10Mb of dual port block RAM.

Design time is also significantly reduced through the tool automatically generating a test bench to verify design functionality, a constraint file for timing, command files for FPGA synthesis, HDL simulation, and implementation tools. The tool also supports multi-rate DSP applications, which represent the majority of FPGA-based DSP implementations.

MATLAB 6.5 integrates mathematical computing, visualization, and a powerful language to provide a flexible environment for technical computing. Simulink 5 is a block-diagram modeling environment for simulating dynamic systems, evaluating performance, and refining control, DSP, and communication system design.

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