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SMIC moves carefully towards 90nm development

Posted: 30 Oct 2002 ?? ?Print Version ?Bookmark and Share

Keywords:semiconductor? lithography scanner? wafers? chips? Grace Semiconductor?

Quietly, but surely, foundry newcomer Semiconductor Mfg Int. Corp. (SMIC) is gathering the tools it needs, including a 193nm scanner, to boost efficiency as it enters into 130nm manufacturing and prepares to begin basic development work for 90nm technology.

Simon Yang, a former Intel Corp. process engineer who serves as SMIC's VP of technology development, said SMIC would take delivery of the advanced lithography scanner by the end of the year from a European supplier - likely ASM Lithography. The tool will be used for critical layers of 130nm designs and for R&D at 90nm, which will begin early next year, he said.

SMIC is also in the process of fine-tuning a 130nm technology reference platform transferred from IMEC, a European research consortium, and looks likely to steer well clear of finicky low-k materials that have been a source of grief for some other foundries.

Instead, SMIC will stick with a fluorinated silicate glass-based process, which has been the fallback option for other chipmakers as they struggle to push yields to higher levels. "Then for the next generation, we will probably not rush in to be a leader in switching material," Yang said. "We will probably watch for industry consensus. It seems that things are shaping up for some CVD-based low-k materials. They seem to be gaining more acceptance, so we will probably start to do some work early next year and then pace ourselves for the 90nm node," he said, adding that SMIC will probably seek another technology alliance at that node.

Sidestepping pitfalls

SMIC seems to be moving forward according to schedule, despite being denied easy access to a range of process tools from American companies due to U.S. government restrictions on the export of such advanced technology to China. Since opening late last year, the company's Fab 1 is on pace to produce 25,000 wafers per month by early 2003, and its recently opened Fab 2 is expected to produce 7,000 wafers per month by this December.

Export licenses are usually forthcoming for equipment coming from the U.S., but may take several months to approve, versus a few weeks for equipment coming from Europe, SMIC officials said, indicating that a global consensus to closely regulate the sale of potential "dual-use" tools that could be applied to commercial semiconductor as well as military applications seems to have broken down as a gloomy economy and a major chip downturn squeezes the bottom line of equipment makers.

Global sales for the lithography business are expected to shrink 29 percent this year to $3.2 billion, down from $4.5 billion in 2001, according to a report released last week from The Information Network. Those figures are a stark contrast from the glory days of 2000, when lithography market revenues hit $6 billion.

The market is expected to recover somewhat in 2003, with sales up about 25 percent to $4.3 billion, The Information Network said. Some of that increase will be driven by Chinese companies like SMIC and its up-and-coming rival, Grace Semiconductor Mfg Corp., which will start to ramp production next year. Other China fabs, such as Huahong-NEC, will also be looking to order more advanced tools.

Unwelcome attention

Yet because of its high profile as China's first pure-play foundry, SMIC has been in the crosshairs of controversy regarding whether the U.S. should relax its policy regarding the export of dual-use items, or at least streamline the process. The attention has often been counterproductive and sometimes couched in such a way as to maximize the greatest return on any potential strife or mistrust between the American and Chinese governments, Shanghai industry watchers said.

Most of the time, when SMIC can justify from a business perspective why it really needs the technology at a certain time, it is usually approved, Yang said. "It is not something where we are trying to rush forward and be the world leader or trying to do some difficult non-commercial product. We just look at the market and tell the U.S. government that at a certain time we will need that technology to survive," he said. "In reality, based on my observation, the U.S. government has been very reasonable. Our only complaint is that it takes a little bit too long."

SMIC is not alone among smaller foundries looking to lay down a more aggressive road map. Silicon foundry startup First Silicon Sdn. Bhd. said earlier this year that it would spend $100 million to procure advanced semiconductor equipment, including 193nm exposure tools for a push into 130nm production.

Tower Semiconductor Ltd, a foundry based in Israel, has recently forged a technology licensing with Motorola Inc., which will make its 130nm copper process available to the Israeli firm, which could be prototyping parts in the process as early as Q1 of 2003. South Korean foundry Dongbu Electronics Co. Ltd is also doing development work.

Hardly a laggard, SMIC has forged alliances of its own, notably with Toshiba Corp. and Chartered Semiconductor Manufacturing Pte. Ltd., with the latter transferring details of its 0.185m process flow to SMIC, which will save several months of process tuning.

A few months ago, SMIC also linked up with Texas Instruments Inc. to do back-end manufacturing for copper interconnect layers, which have more relaxed design rules that can be handled by older 248nm scanners. Yang said TI is not helping SMIC to develop its process. Still, the experience will nonetheless be helpful as the young company prepares for increased local competition from industry stalwarts Taiwan Semiconductor Mfg Co. Ltd and United Microelectronics Corp., which should have fabs up and running in China next year.

By then, SMIC should be deep into its learning curve for 130nm technology. As it stands, Yang is sidestepping the troubles of low-k materials by sticking with FSG as an insulator. For high-performance chips that really need to scale up in speed, Yang said the benefits of low-k materials, such as reduced RC delay across larger die, are not a panacea and he is inclined to believe that a greater difference is made at the chip design level.

"You definitely need help from all areas," he said. "A lot of times people do not really think very clearly on that issue and they just rush into using a low-k material that is very difficult to do in terms of reliability issues and yield issues."

- Mike Clendenin

EE Times

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