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Xilinx fast-tracks RapidIO

Posted: 18 Nov 2002 ?? ?Print Version ?Bookmark and Share

Keywords:rapidio? core connect bus? xilinx? powerpc? virtex ii pro?

Xilinx, Inc. has introduced RapidIO cores for its latest FPGAs with embedded PowerPC processors - a move that will give designers an early crack at developing embedded systems with the fledgling interconnect scheme.

The PowerPC is considered a natural fit for RapidIO since both Motorola and IBM, which provide the RISC processor, are backing the interconnect technology and plan to incorporate it in future PowerPC devices.

Anticipating that development, Xilinx has developed a soft IP core for its latest line of Virtex II Pro devices with embedded PowerPC 405 cores. The devices are expected to be used as prototyping vehicles for such applications as cellular basestations, software-defined radio equipment, and high-definition TV broadcast equipment, said Per Holmberg, director of programmable-systems marketing at Xilinx.

In some cases, the devices are expected to make their way into the end equipment itself, especially in systems that are heavy in DSP content. "What we've seen designers do is break out the computation-intensive algorithms into an FPGA fabric to increase parallelism," Holmberg said.

The RapidIO core is designed to bridge the local interconnect to the FPGA fabric and the Core connect bus, IBM's on-chip bus for PowerPC-based devices. Xilinx has licensed the IBM bus as part of a broader partnership agreement that includes the rights to use IBM PowerPC 405 cores in FPGAs and the use of IBM's manufacturing facilities to fabricate the products. The companies are also working to develop a way to embed FPGA cores into ASICs.

The first PowerPC to include RapidIO from IBM will be disclosed next year and will likely go beyond the capabilities of the 405, although software compatibility will be preserved, said Kalpesh Gala, PowerPC marketing manager at IBM Microelectronics.

Xilinx's RapidIO cores conform to version 1.1 of the interconnect specification, which is based on an 8bit LVDS technology. Xilinx said it is also working to develop cores for the serial RapidIO specifications.

- Anthony Cataldo

EE Times

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