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Xilinx releases v2.3 of DSP tool System Generator

Posted: 02 Dec 2002 ?? ?Print Version ?Bookmark and Share

Keywords:xilinx? system generator for dsp? dsp tool? dsp design? fpga design?

Xilinx Inc. has announced that it is shipping v2.3 of its System Generator for DSP tool, which features enhanced multipliers that allows designers to achieve speeds of up to 285MHz while using the Virtex-II series of FPGAs.

The tool automatically translates DSP systems developed from The Mathworks' MATLAB and Simulink tools into VHDL and IP cores for Xilinx's FPGAs. The new version also supports three times faster code generation and provides over a dozen reference designs/tutorials designs for digital communications and image processing, including a 16-QAM receiver, LMS-based adaptive equalizer, Costas Loop carrier recovery circuit, CORDIC processor, 2-D DWT, and image filters.

Also included is an application note describing how to create custom DSP data path peripherals for the IBM CoreConnect bus architecture.

The company also announced its IP release 1 for the ISE 5.1i software. This release allows designers to implement pre-verified, pre-optimized, DSP algorithms in order to finish designs faster and reduce system costs.

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