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TI LVDS translators tout jitter, power performance

Posted: 05 Dec 2002 ?? ?Print Version ?Bookmark and Share

Keywords:texas instruments? sn65lvds100? sn65lvds101? sn65lvds122? lvds translator?

Texas Instruments Inc. has released its line of LVDS translators that offers lower jitter and power consumption, compared to existing market solutions, making them suitable for wireless basestations, optical networking, and high-definition video applications.

The SN65LVDS100 uses 67 percent less power than competing LVPECL devices and operates as an LVDS to LVDS repeaters or as an LVPECL or CML to LVDS translators. On the other hand, the SN65LVDS101 functions as an LVPECL to LVPECL repeaters, as well as an LVDS or CML to LVPECL translators. Both offer a maximum jitter of 65ps while operating at 2Gbps.

Suited for GbE and OC-12 clock distribution applications, the SN65LVDS122 is claimed by the company to be fastest and lowest jitter 2x2 LVDS crosspoint switch. It has either LVDS or LVPECL input and LVDS outputs, and is capable of operating as a dual differential repeater/translator and a 1:2 splitter.

"TI's new LVDS translator/repeaters and cross points extend the low power consumption and low EMI benefits of LVDS to speeds up to 2Gbps thus providing a true low jitter alternative to legacy ECL solutions," claimed David Mulcahy, product marketing manager for interface products at TI.

A 3.3V supply operation eliminates the need for a 5V rail in 3.3V only systems, and uses much less power than LVPECL solutions. A reference voltage pin is made available for operation with single-ended LVPECL inputs.

The SN65LVDS100/101 translator solutions are available in an 8-pin D-SOIC and DGK-MSOP packaging, and are priced at $2.52 each in quantities of 1,000. The SN65LVDS122 is available in a 16-pin D-SOIC and PW-TSSOP, with planned pricing of $4.75 each in 1,000-piece quantities.

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