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PDF Solutions methodologies obtain U.S. patents

Posted: 13 Dec 2002 ?? ?Print Version ?Bookmark and Share

Keywords:ic manufacturing? test ic? pdf?

PDF Solutions Inc., a provider of semiconductor process-design integration technologies and services, has announced that the U.S. Patent and Trademark Office has granted the company two patents related to improving the manufacturability of ICs.


The first patent is for PDF's system and method of simulating the manufacturing of an IC product, and thus predicting, prior to production, its manufacturing yield. The second patent is for the innovative design of PDF's Characterization Vehicle test chips, which are also known as CV test chips. Both patents are for core elements of PDF's infrastructure to improve product designs and manufacturing processes before the expense of silicon fabrication.

PDF's yield simulation technologies and methodologies have been developed over multiple advanced technology nodes, and have been applied to more deep sub-micron IC manufacturing ramps than any other company's technology. PDF commercially offers its exclusive yield prediction system through a combination of PDF's CV test chips and Yield Ramp Simulator software.

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