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AMD discovers a Flash nanowire structure

Posted: 13 Dec 2002 ?? ?Print Version ?Bookmark and Share

Keywords:analog micro devices? nanoelectronic structure? polysilicon nanowire? flash cells? memory?

A novel nanoelectronic structure has startled researchers at Analog Micro Devices Inc. (AMD) with a sudden show of promise for future Flash memory devices. The structure, called a polysilicon nanowire, was under investigation as a possible method for fabricating Flash cells in processes below 65nm. But it caught the attention of researchers by demonstrating an entirely unanticipated - and quite possible quantum electronic behavior.

AMD believes it can probably scale the existing stacked-gate Flash cell to the 65nm process node, according to vice president of technology Craig Sander. But the company is searching for novel structures that can be fabricated below that level.

The discovery was detailed in a paper delivered at the International Electron Devices Meeting (IEDM).

One candidate is a device with a conventional transistor gate structure without a floating gate. Embedded in the gate oxide of the transistor, in a horizontal plane between the gate and the channel, is a tiny wire ring that surrounds the channel.

This ring is composed of polysilicon with a tear-drop cross-section, and is separated from both the gate and the channel by extremely thin layers of oxide. It is fabricated by a very controllable series of process steps that etch into the oxide under the edges of the gate, deposit a tiny ring of polysilicon and oxidize all but an even tinier ring, as small as 1nm or 2nm thick. The oxide between the ring and the gate or channel may be less than 2nm thick as well.

That tiny ring, called a poly nanowire by the researchers, acts like the floating gate on a conventional cell. Charge can be moved on and off the nanowire either by tunneling or by hot electron migration. As in conventional devices tunneling is safer with the Flash very thin oxides involved, but tends to require very long programming times.

The interesting result came when the researchers fabricated devices with very thin nanowires, in the region of 2nm. The programming times dropped by two orders of magnitude compared to devices with similarly thin oxide layers but with thicker nanowires. And data retention estimates proved very acceptable.

The team believes that they are seeing a quantum well memory effect. They estimate that only between 200 and 1,000 electrons are being trapped in the nanowire ring, resulting in the very fast programming times, on the order of 70ns in the fastest reported case. Yet this tiny charge still has a significant impact on the threshold voltage of the underlying transistor, making the cell a readable memory.

Sander cautioned that the devices had only been fabricated in forms intended for study of the individual cell characteristics, and that AMD had no data on the behavior of arrays of the cells. But the initial results show significant promise, and suggest that there may be useful quantum charge storage devices to be discovered in the region just beyond conventional FET structures and scales, and with operating characteristics compatible with existing circuit designs.

- Ron Wilson

EE Times

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