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Lattice PLD touts speed, size

Posted: 17 Feb 2003 ?? ?Print Version ?Bookmark and Share

Keywords:lattice semiconductor? ispgal22v10a? isp spld? simple pld? pld?

Lattice Semiconductor Corp. has announced the availability of its ispGAL22V10A family of ISP simple PLDs (SPLDs) that operate up to 455MHz with 2.3ns pin-to-pin delay and <300mW standby power, while supporting I/O standards of 3.3V, 2.5V, and 1.8V.

Offered in a 32-pin QFN, the PLD is 84 percent smaller than the traditional PLL packaging and is suitable for high-density PCBs used in small-scale consumer and portable electronic applications such as cellphones, pagers, and PDAs. However, the PLD is also still offered in 28-pin PLCCs.

The ispGAL22V10AC is also claimed to be the industry's first 1.8V in-system programmable SPLD, and is also offered in 2.5V (ispGAL22V10AB) and 3.3V (ispGAL22V10AV) versions. For devices in the QFN package, output voltage is independent of core supply voltage through the use of a separate Vcco connection. The I/Os on the ispGAL22V10A family are 5V tolerant and can be "hot socketed" to facilitate connection to legacy chips and interfaces.

"With our E2CMOS low-power cell and advanced CMOS design techniques, the ispGAL22V10A family offers the highest performance, while simultaneously delivering low standby power," said Steve Stark, Lattice Semiconductor's director of product marketing.

The ispGAL22V10A family is supported by Lattice's new software platform ispLEVER v3.0 Service Pack 2003.01. Programming support will be through Lattice's ispVM v13.0 software, which is downloadable from the Lattice web site.

Pricing, in high volumes of 50,000 pieces or more, will be <$1.





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