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NEC delivers hardware-based TTP bus controller

Posted: 05 Mar 2003 ?? ?Print Version ?Bookmark and Share

Keywords:nec electronics? ttp bus controller? time triggered protocol? tina?

NEC Electronics Corp. has announced the availability of a new time-triggered protocol (TTP) bus controller ASIC that assumes the protocol functions in the hardware, thereby improving system performance by relieving the host CPU.

With TTP functionality, the bus controller - codenamed "TINA" - allows signals to be generated based on time slots rather than on standard, external arbitration events. This feature is important for safety-critical automotive systems that require reliable information combined with high-speed throughput.

TINA communicates with the host computer via an 8-, 16-, or 32-bit bus interface. It is compatible with a wide range of microcontrollers, including the company's 32-bit V850 microcontrollers for automotive applications.

The two-channel, 100-pin QFP device is based on Computertechnik AG's TTP-IP "C2S" protocol. It transfers data asynchronously at speeds of up to 5Mbps (40MHz) and is equipped with 12KB of RAM, 4KB for the Communication Network Interface used for data storage, and 8KB for the Message Descriptor List used for scheduling information.

TINA operates from a single 3.3V power supply over the -40C to 85C temperature range and features an interframe gap <5?s.

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