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TSDR0403G SERDES Macro V1 Error-Free Performance in a Backplane Environment at 3.125Gbps with PRBS 2^7-1 Data

Posted: 11 Mar 2003 ?? ?Print Version ?Bookmark and Share

Keywords:agere systems? TSDR0403G v1? serdes? serializer ic? deserializer ic?

This document describes measurements that were made on a TSDR0403G V1 test chip to illustrate the eye opening after driving a backplane path configuration.

View the PDF document for more information.



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