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Motorola's G4 PowerPC line cut power to 10W at 1GHz

Posted: 17 Mar 2003 ?? ?Print Version ?Bookmark and Share

Keywords:g4 powerpc? mpc7457? mpc7447? altivec? risc?

Two new versions of Motorola Inc.'s G4 PowerPC line take power dissipation down to 10W at 1GHz and as low as 8W in some applications.

By improving capacitance specifications and taking core voltage down to 1.3V, the MPC7457 and MPC7447 processors draw the least power of any embedded RISC chips in that performance class, according to Motorola.

Since the processors are pin-compatible with the 7455/45 and 7451/41, they can be drop-in replacements for 733MHz processors.

Motorola is simultaneously offering new software tools for its AltiVec vector instruction set extensions to the PowerPC, hoping to make them more useful in networking applications. Division marketing manager Glenn Beck said that it was time for a reckoning of sorts with AltiVec: "Either we had to make the vector instructions useful to a wider group of designers or take the features off the chip."

He said three features improve AltiVec's design utility: code libraries, vectorized network applications and more software.

The C++ code libraries will be offered for popular networking and telecom modules.

Free integration

Designers can integrate vectorized network applications, such as a TCP/IP stack, into their embedded code free.

Motorola has set up an AltiVec Center of Excellence providing additional software tools and support services for using AltiVec in end applications such as virtual private network servers and voice gateways. Eventually, the Center of Excellence will be expanded to include other vertical applications in addition to networking and telecom, Beck said.

The MPC7457 processor, the more full-featured of the introductions, is a 483-lead device with 512KB of Level 2 cache, able to support up to 2MB of Level 3 cache. Its top frequency is 1.3GHz. The MPC7447, which tops out at 1GHz, is intended for more space-constrained applications, packaged in a 360-pin ceramic BGA.

Both processors combine the G4 superscalar core with AltiVec single-instruction/multiple-data vector instructions. The two chips have eight data and instruction block address translation registers, intended to support embedded real-time operating systems through mapping of data blocks.

Alpha samples are available from the computing platforms division now.

- Loring Wirbel

EE Times





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