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Zarlink packs timing module into 2.54-by-2.54mm DIL package

Posted: 16 Apr 2003 ?? ?Print Version ?Bookmark and Share

Keywords:zarlink semiconductor? zl30462? timing module? timer module? sonet timer module?

The ZL30462 timing module from Zarlink Semiconductor Inc. integrates a complete timing system into a 40-pin DIL package measuring 2.54-by-2.54mm - the smallest in its class - and helps network equipment companies cut design cost and speed time-to-market.

The timing module is designed for use in access line cards to generate and synchronize clocking signals used by other devices on the boards, including framers, switchers, and optical line interface chips. It is suitable for line cards operating at SONET/SDH and can also be used in master timing cards for SDH access equipment.

The ZL30462 combines digital and analog PLL technology with a 20MHz master oscillator into a package no larger than a postage stamp. It offers a jitter-attenuated 155.52MHz LVPECL output required by STM-1/OC-3 optical line interface chips and framers. It also produces a jitter-attenuated, 19.44MHz CMOS clock, two 8kHz frame pulses, and clocks operating at 2.048MHz, 8.192MHz, and 16.384MHz.

The module accepts frequency references from two independent sources, and each input can be programmed for operation at 8kHz, 1.544MHz, 2.048MHz, or 19.44MHz.

Reliability features include time-interval error correction and automatic holdover. Other features are support for free-run and locked modes, low intrinsic jitter and wander, and is fully compliant with the network synchronization requirements of Telcordia's GR-1244-CORE standard for Stratum 4E clocks.





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