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Terachip, EZchip team on reference design

Posted: 21 Apr 2003 ?? ?Print Version ?Bookmark and Share

Keywords:terachip? ezchip? networking? card reference? switch fabric chip?

Two Israeli startups, EZchip and Terachip, have banded together to develop a 10Gb line card reference design for networking applications that combines EZchip's NP-1 network processor and QX-1 traffic manager with Terachip's TCF16X10 switch fabric chip and soon-to-be released TCI1X2 line-card interface chip.

The EZchip/Terachip partnership could provide a good fit for the networking sector. Both companies have been focusing on one aspect of the datapath processing architecture and on reducing overall chip counts. By combining, the companies can provide a more complete solution to the market, said Dror Sal'ee, vice president of marketing at Terachip.

Through the reference design, designers can build a 10Gb line card that allows packets to be processed by the NP-1 network processor and QX-1 traffic manager and then handed off to the TCF16X10 switch fabric through the TCI1X2 line-card interface device. Since the TCF16X10 comes equipped with output queuing capabilities, designers can also leave off the QX-1 in some applications to further reduce power and chip count.

The TCI1X2 interface device, which draws 6W of power and is housed in a 672-lead BGA, is one of the more interesting elements in the proposed reference design. In early February, Terachip released its fabric chip but did not provide details on the line-card interface chips, which play a vital role in Terachip's overall fabric architecture. Now, through its work with EZchip, the company is providing some insight into the line of interface devices.

"Basically, the line card interface IC is a protocol conversion device," Sal'ee said. For example, the TCI1X2 can interface to a single CSIX or SPI 4.2 interface on a network processor or traffic manager and converts signals from that interface into one of two XAUI interfaces that can be used to link up with the TCF16X10 fabric. Terachip is also working on the TCI2X4 for 20Gbps line cards, which converts 2 CSIX/SPI 4.2 interfaces into four XAUI interfaces.

EZchip and Terachip have a version of the reference design available now that includes a prototype of the interface chip. A more complete version of the board, with a working interface chip, will be on display at Networld+Interop in May.

- Robert Keenan

EE Times





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