Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > EDA/IP

Artisan memories provide IC design standard for Japan consortium

Posted: 21 May 2003 ?? ?Print Version ?Bookmark and Share

Keywords:memory generators?

Artisan Components Inc., a provider of physical intellectual property, has announced that its memory generators have been selected by the Semiconductor Technology Academic Research Center (STARC), a consortium comprised of Japan's leading semiconductor companies. STARC will standardize on Artisan's memory products for IC designs targeted at 90nm processes.

The designs will be produced at Advanced SoC Platform Corp. (ASPLA) - a common fabrication facility established by Japan's IDMs that have jointly developed mainstream and low-power process technologies. Artisan will deliver a comprehensive offering of its memory generators for single- and dual-port SRAMs, single- and two-port register files, and diffusion programmable ROMs. The suite of products will be optimized for ASPLA's 90nm process technologies' design rules and characterized using ASPLA's latest electrical models.

The members of STARC and ASPLA include Fujitsu Ltd, Matsushita Electrical Ind. Co. Ltd, NEC Corp., OKI Electric Ind. Co. Ltd, Renesas Technology Corp., Rohm Co. Ltd, Sanyo Electric Co. Ltd, Sharp Corp., Sony Corp., and Toshiba Corp. The twelve companies have been working together to offer a standardization of IP components for SoC design and establish manufacturing technology platform to drive the fabrication of these devices in 90nm and lower process technologies.

Article Comments - Artisan memories provide IC design s...
*? You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.

Back to Top