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Combine hardware and software design in programmable SoC

Posted: 02 Jun 2003 ?? ?Print Version ?Bookmark and Share

Keywords:scsd? fpsoc? soc? c? c++?

Not too long ago, the challenges of system design were mainly discussed in the context of SoC devices that combined millions of gates with embedded processors. As design complexity increases, so does the adoption of higher-level languages (HLLs).

In the field programmable SoC architecture, the microprocessor typically runs system applications while the FPGA manages computationally intensive tasks. The availability of the processor and the millions of gates in programmable logic give designers new opportunities to quickly develop, prototype, and implement complete systems - delivering better performance and flexibility. But these complete system devices also present all the challenges of traditional hardware and software design.

FPGA hardware was traditionally designed using techniques, methodologies and languages borrowed from ASIC design. Software development is undertaken using techniques, methodologies and languages designed to describe software systems. There has been a divide between the disciplines and it is often apparent that hardware and software methodologies do not talk together.

Current methods for embedded systems design require that the hardware and software be specified and designed separately. System specifications typically use C or C++, and then create a paper document that delegates the functional design to the respective hardware and software teams. The design implementation is then coded in different languages. The software team maintains the use of C or C++, while the hardware team translates the paper specification into VHDL or Verilog. This process precludes co-design and the partitioning is often decided according to historical divisions.

They can be revisited once the partition decisions are made, as changes to the partition can necessitate expensive redesign of both the hardware and software. System verification in this process is similarly hindered by the gap between the hardware design flow and the original specification.

The deficiencies of the current state of system designs are clear:

  • Lack of a unified hardware-software representation leads to difficulties in verification of the entire system and to incompatibilities across the hardware-software boundary;

  • Defining system partitions in advance leads to sub-optimal designs or requires costly redesign;

  • Hardware implementations of the system specification require time-consuming and possibly error-prone rewriting into HDL; and

  • Lack of a well-defined and flexible co-design methodology makes specification revision difficult and affects time-to-market.

    Software-compiled system design (SCSD) is a methodology converging hardware and software techniques, providing a cohesive path from system specification and functional algorithm identification through partitioning and verification, to system implementation. The resulting output is a functionally verified design implemented in an FPSoC device.

    The process is defined by four elements. First, algorithm design begins with functional modeling using HLL design descriptions. Specifically, system descriptions utilize C-based languages such as C, C++, SystemC, SpecC, or Handel-C. Second, the designer flexibly partitions the design between hardware and software, finding the optimal split before beginning the implementation. To meet the third requirement, the system is verified at the highest level to create a functionally correct design before implementation. Finally, direct paths to implementation are provided through compilation from C-based descriptions into both software and hardware.

    The success of this approach is predicted on the use of HLL descriptions for system functionality. The exact language used for modeling at this level is less important than the capability to provide compatibility with system architectural analysis and to support easier, verifiable partitioning.

    The methodology supports C-based descriptions that can represent the functionality of a design block, independent of the eventual implementation in either hardware or software. While VHDL and Verilog are mature and capable hardware description languages, they are not optimal for compiling software elements of the design to run on processors. C-based description languages enable a common development path between hardware and software elements of the design.

    There are many C-based languages that could fulfill the requirements for software-compiled system design. In the Celoxica implementation of SCSD, users often employ different languages for different blocks in a mixed-language environment to take advantage of specific modeling strengths in the languages, or to avoid rewriting existing IP. However, as the design gets closer to implementation, the tools often dictate the specific language for compilation. Embedded software is compiled into the processor from C or C++.

    - Jeff Jussel

    Marketing VP

    - Chris Sullivan

    Strategic Alliances Director

    Celoxica Ltd

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