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PMC-Sierra MIPS processors eye networking systems

Posted: 24 Jun 2003 ?? ?Print Version ?Bookmark and Share

Keywords:pmc sierra? rm7900? rm7965? rm7935? mips?

PMC-Sierra Inc. has introduced the RM7900, RM7965, and RM7935 MIPS-based processors for networked laser printers, storage systems, personal video recorders, high-definition televisions, set-top boxes, routers, and switches.

The RM7900 processor family is designed with the E9000 CPU core used in the RM9000 multiprocessor family. The 7-stage, dual-issue pipeline CPU extends performance from 600MHz to 900MHz, and the E9000 core includes a dual-integer superscalar processor with a two-level cache hierarchy, MMU, and branch predictor. The E9000 core contains 16KB of instruction, 16KB of data cache and 256KB of Level 2 cache.

Providing on-chip EJTAG debug modules, the processor ensures smooth and easy debugging for both hardware and software by allowing single-step and state examination. The products incorporate ECC on the Level 2 cache to provide increased data integrity by checking for errors and, when necessary, correcting the data as it is being transmitted or read.

The RM7900 is offered in 304-pin TBGA, the RM7965 in 256-pin TBGA or 216-pin ExposedPad, and the RM7935 in 128-pin ExposedPad. The devices utilize the 0.13?m CMOS technology process, and are priced at $119 in 1,000-unit quantities.

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