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A walk through DSP evolution curve

Posted: 16 Jun 2003 ?? ?Print Version ?Bookmark and Share

Keywords:dsp? upd7720? wireless communication? vliw? spxk5?

In 1980, NEC Electronics (then part of NEC Corp.) made its entry into the DSP arena by rolling out ?PD7720, one of the first commercially successful DSPs in the world. It was designed in 2.4?m NMOS technology and had a 16bit-wide data word, while its instruction word was 24bit-wide for highly parallel operation. In the age when 4bit or 8bit microcomputer was dominant, NEC was one of the first vendors to introduce the idea of very long instruction word (VLIW) to DSP architecture.

When ?PD7720 was gaining market acceptance in the early 1980s, the main application for DSP was in telecom products such as modems and switching systems. The later migration to CMOS technology widened the market to other consumer-centric products. Then, in the early 1990s, a dramatic change in the DSP environment happened: the emergence of digital cellphones.

Currently, more than 60 percent of DSPs are used in the field of wireless communications, especially in cellphones. This strong demand from the wireless communication segment is driving the growth of the whole DSP market, contributing to the year-on-year growth of 22 percent in 2002 worldwide.

Power gambit

Low power, a key requirement for cellphones, is the most critical technology for current DSPs. At the early stage, low-power technology development for DSP only involved fundamental circuit techniques including "gated clock". However, more effective methods such as holding power supply voltage lower than 1V are required today.

It is well known that the power of CMOS circuitry is proportional to the square of the power supply voltage, and is thus greatly affected by its change. Due to the lowered power supply voltage, today's most advanced DSPs are able to realize ultra-low power consumption that enlarges the potential of DSP applications, replacing the functions traditionally achieved by custom hard-wired logic ICs. For example, even full software video codec works on some of the latest DSPs without a hardware accelerator.

In 150nm process-node generation, 0.9V ultra-low voltage can cut down power consumption by half compared with 1.5V nominal power supply voltage. In 130nm process-node generation, we can control voltage more precisely. In this process generation, the operating speed may slow down roughly by half for each 0.3V decrease of power supply voltage.

With this characteristic, we can make power consumption and operating frequency well-balanced and optimized.

However, optimizing the circuit designs while making most of these variable voltages is not an easy task and only sophisticated designers of DSPs and processors can accomplish it. NEC Electronics, for instance, took advantage of this design in developing the recently released SPXK5 DSP core. Available both as an ASIC core (SPXK5 Super Core, with 144KB high speed SRAM and cache and AMBA AHB bus interface) and as a standalone product (?PD77050, a variable voltage DSP that can be used as a 3G cellular application processor), SPXK5 technology is aiming to provide efficient power-management solutions.

- Tetsuro Kanai

General Manager

1st System LSI Division

NEC Electronics Corp.





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