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Synopsys strengthens verification efforts with acquisition

Posted: 27 Jun 2003 ?? ?Print Version ?Bookmark and Share

Keywords:Synopsys? InnoLogic Systems? formal verification? SoC designs?

Synopsys Inc. has acquired InnoLogic Systems Inc., a provider of memory and full-custom equivalence checking technology. With this acquisition, Synopsys will have a more comprehensive formal verification solution for complex SoC designs containing large instances of embedded memories, complex high-speed I/Os, and other full custom circuits.

According to Synopsys, InnoLogic's solution is able to verify the functionality of custom designs through an approach called "sequential equivalency checking" which is based on a patented symbolic simulation technology. In addition, InnoLogic's transistor-level formal analysis capabilities consider the dynamic effects of transistor size and process technology. These capabilities enable the custom circuit designer to fully verify the functional equivalence of their behavioral level simulation models against their transistor-level implementation netlist.

"With a large percentage of total silicon being consumed by memories and complex high-speed I/Os, we recognized the growing need for technology that can quickly and accurately verify the functionality of these custom components," said Antun Domic, SVP and general manager of Synopsys' IC Implementation business unit. "By retaining the strength of InnoLogic's key technology and technologists we will be able to extend our equivalence checking capability to address challenges of highly complex custom designs," he added.

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