Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
?
EE Times-Asia > Processors/DSPs
?
?
Processors/DSPs??

Management tools remove the guesswork from DSP power

Posted: 01 Sep 2003 ?? ?Print Version ?Bookmark and Share

Keywords:management tool? dsp? power design? pll? clock?

Portable product designers know that when consumers shop they evaluate size, weight and operating life as key factors for their purchasing decision. Thus, building a small, lightweight portable product that can hold its battery charge for an extended time is a competitive advantage in today's market.

The concept is simple: the less power a handheld system consumes, the longer it can operate between battery charges, and the smaller, lighter-weight and less expensive the batteries it can use. The bottom line is that increasing power efficiency may make a decisive difference in the marketplace.

Developers clearly understand the advantages that good power design can bring; but in the past, optimizing power consumption in systems based on DSPs was largely a matter of trial-and-error. Measuring system power efficiency was typically done late in the development cycle, when relatively little improvement could be introduced because the software and hardware were already integrated and system validation had begun.

The situation is changing today as innovations in power scaling are appearing in DSP platforms and software tools. New analysis and control capabilities take the guesswork out of DSP power design, enabling developers to build new systems that consume less power while offering the same or greater functionality.

Greater visibility and control

Power tools from silicon vendors not only provide visibility to help developers identify power-greedy areas in their code, but also supply dynamic, software-based power management capabilities. Using the tools, developers have the means to measure power consumption to identify power-intensive "hot spots" in their code and to directly manage the core and peripherals to achieve more power-efficient execution. Graphic displays provide static information on power consumption throughout the system, as well as dynamic information about power consumption over time.

As a result, the developer can see which hardware functions are using the most power and where the power peaks, troughs or spikes are in the program execution.

The power tools are supported by control features designed into the DSP hardware. In a platform such as Texas Instruments' TMS320C55x DSP, for instance, the core operating frequency can be changed through a programmable PLL. The PLL clock, which can be selected by setting appropriate values in software for clock division and multiplication, becomes the source of all on-chip clocks and drives the core directly.

In addition, the core is operable at variable voltages, starting from about 1V, and can be scaled in conjunction with the frequency. The DSP can also switch some sections of the chip, such as on-chip memory, to low-power modes. Finally, the core, DMA, instruction cache, peripherals, clock generator and external memory interface domains can all be idled via assembly instructions when not in use. All these power control capabilities - frequency, voltage scaling, low-power modes and idling - help developers achieve the optimum mix of performance and power conservation in DSP systems.

Measuring and managing power

Software tools for power measurement and management provide the means for using the DSP hardware power controls efficiently. Power measurement tools enable developers to determine power budgets and estimate battery life more effectively by measuring the power consumption of a DSP, system or I/O functions visually.

Power management tools provide a consistent framework for access and control, enabling the developer to manipulate the DSP hardware to reduce power consumption at runtime without sacrificing performance. Developers can use these tools in the same way that they currently use cycle count profilers and other tools that provide visibility and the means to optimize code execution on the device.

A power analyzer tool can be used in conjunction with a power scaling library (PSL). Power measurements are correlated to the functions that make up the application. The maximum and average power usage for each function is displayed, allowing the user to identify the functions that consume the most power. Since peripherals can contribute significantly to power consumption, data concerning user-selected peripheral usage are also displayed.

In the bottom window, the data is displayed graphically over time. Using this oscilloscope-like view of the raw data, the developer can readily see which peripherals are on or off during execution and determine where the spikes are in power consumption. Power consumption by individual peripherals and the entire system are represented by separate lines. With this information, the developer can decide whether to rewrite or fine tune these functions to improve the cycle count for better overall power efficiency.

Typically, not every function within an application, such as an MP3 player or a digital still camera, requires the full performance of the DSP to get its job done. A power management tool such as a PSL can slow down the core frequency for these functions, allowing the task to complete efficiently but with less power. Lower frequencies require less voltage, so the tool automatically lowers the voltage along with the frequency to achieve greater power savings. In addition to these dynamic runtime controls, query operations and callbacks to the user's code are supported. Using callbacks, the developer can check the real-time system requirements against the rescaled core clock times and then adjust the peripherals as necessary.

Design example: audio

The savings in power consumption from using efficient power management can be illustrated by a test case using the above tools in a digital graphical equalizer application that performs several FFTs on an audio signal. The power analyzer tool shows that the algorithm draws an average current of about 180mA and consumes approximately 25 percent of the core's cycles when the DSP is operating at 1.6V and 200MHz.

The average current drops to 90mA and about half of the core's cycles are consumed when the clock frequency is lowered to 96MHz. The overhead at this reduced frequency is approximately 50 percent, so the DSP can easily handle the application's peak processing requirements and the audio signal continues to be processed smoothly without degradation in output.

The application's power consumption changes as the frequency changes. At first, when the application is running at a full 200MHz, it consumes more than 250mW of power. When the developer's program calls the PSL at the start of the hot spot function, the tool reduces the frequency to 96MHz. The time required for the clock generator to lock to the new frequency is about 20?s, after which the PSL returns control to the program. Now that the frequency has been reduced, the PSL goes on to lower the voltage automatically to 1.1V, the minimum level possible in this case. The application is now consuming roughly one-fourth of the original power used, or about 60W.

When the hot spot function is finished, the developer's program calls the PSL to scale the frequency back to the full level. First, the PSL increases the voltage to 1.6V, then it raises the frequency to 200MHz. Control is not returned to the program until the voltage and frequency have been increased. In this case, the time spent in the PSL is about 340?s, since the PSL must wait for the voltage increase to be completed before it can increase the frequency. If only the frequency of this audio function is scaled, power consumption is reduced by 54 percent.

When both the frequency and voltage are scaled, a savings of 73 percent is realized. The audio is not interrupted during the PSL calls or low-frequency/low-voltage operation, and it continues to sound the same to the listener throughout the process.

Dispelling the magic

Determining the power requirements of software during the early stages of system development has previously seemed like a black art. Today, power measurement and management tools dispel the magic by adding significant visibility and control for DSP system designers. It is no longer necessary to wait until the software and hardware have been integrated to analyze and manage software power consumption effectively.

For developers of portable products, the early warning provided by these power analysis tools can help maintain power budgets, eliminate costly redesign and speed time-to-market. In addition, managing power hot spots can help manufacturers differentiate their products with smaller batteries, longer operating times and more robust features.

- Lori Vidra

Product Marketing Manager

- Ed Anderson

Software Engineer

Software Development Systems Division, Texas Instruments Inc.





Article Comments - Management tools remove the guesswor...
Comments:??
*? You can enter [0] more charecters.
*Verify code:
?
?
Webinars

Seminars

Visit Asia Webinars to learn about the latest in technology and get practical design tips.

?
?
Back to Top