Researchers reflect on maskless lithos

An invitation-only workshop has kicked off last September 8, to explore a form of maskless lithography based on arrays of micromirrors.

The Low Volume Patterning Workshop, organized in Olympic Valley, California, by Semiconductor Research Corp. (SRC) and the Defense Advanced Research Projects Agency, is expected to consider not only the technical challenges that are facing the approach but also the feasibility of a demonstration project that would bring together government and private research efforts, said workshop chairwoman Sherry Gillespie.

The goal is to create a scanner based on a programmable or reconfigurable mask from an array of 50 million to 100 million micromirrors, with each mirror measuring fewer than 10?m. The mirrors would reflect light pulsed as fast as 10kHz onto a wafer covered with normal optical resists.

Without masks, a reasonable throughput target might be five 300mm wafers per hour, sufficient for low-volume products as well as early prototyping.

The approach competes against another form of low-volume patterning, based on multiple electron beams. Among those pursuing the e-beam approach to maskless lithography are Japan's Canon and Hitachi; a startup named Mapper, based in Holland; a joint venture among Toshiba, Ebara, Tokyo Electron and Dai Nippon Screen; and Leica.

To pursue the mirror-based approach, Micronic Laser Systems AB (Taby, Sweden) and ASML, formed a joint venture in July that will work with mirror array technology developed at the Fraunhofer Institute. Micronic has already used mirror arrays for a mask-patterning system that is gaining market acceptance.

The SRC/Darpa workshop participants will hear a presentation from Silicon Light Machines, recently purchased by Cypress Semiconductor Corp. Silicon Light Machines will assert that the light-grating technology it has developed for optical communications could be applied to low-volume patterning.

"Maskless lithography is somewhat of a misnomer," said Gillespie, a physicist who worked in research at both IBM and Motorola. "There is a piece of hardware in there, but it is programmable. The really exciting thing about it is that once you've gotten the hardware shaken out, you can use it for any pattern."

The U.S. government has a "strong interest" in low-volume patterning, in part because of the military's need for small quantities of very advanced chips, she said.

Sandia National Laboratory, near Albuquerque, N.M., has been studying the issue extensively, said Daniel Herr, director of material and process science at SRC. Some of the researchers who earlier worked at EUV LLC, which was set up to pursue extreme-ultraviolet (EUV) lithography, are now working on the mirror-based maskless challenge, Herr said. Jim Allen, a Sandia staff scientist, is slated to give a presentation Tuesday at the low-volume-patterning workshop.

Herr said the goal is to have a demonstration tool ready by 2007 or 2008 that could prove the micromirror approach is feasible. The challenges are not trivial.

"How do you put 100 million mirrors on an array? How do you get the data - which could be as much as 10 terabits of data per second - to the array? How do you develop compression and lossless decompression, which may be essential for handling that much data?" Herr said.

For six years, SRC and Darpa have been jointly funding the Network for Advanced Lithography, which is researching both e-beam and mirror-based maskless lithography. Network partners include the University of California campuses at Berkeley and Stanford, Georgia Tech and the University of Texas at Austin.

UC-Berkeley professor Bill Oldham, who directs the Network for Advanced Lithography, said one major challenge is to find practical ways to make mirrors with the right properties. "You might say, 'Why don't you start with the Texas Instruments mirror chip?' But that is designed for a display application, and it is a digital chip; the mirror is either on or off.

"That's not the kind of mirror we need for maskless lithography. We need to modulate the intensity of the light, so we have to do a gray-scale approach, like half-tone printing. We need to modulate the mirror."

That, Oldham said, requires putting analog memory behind each micromirror, a formidable engineering challenge. Both Stanford and Berkeley are fabricating prototype mirror arrays in their university fabs, albeit at low densities, he said.

For displays, which TI is targeting, the mirror density needs to address perhaps a megapixel in a high-resolution display. For maskless lithography, the mirrors would need to address 10 to 15 megapixels "just to get going, and they have to be analog," Oldham said.

For deep-ultraviolet light, the mirrors range in size from 2 to 10 microns. Eventually, EUV light, with a wavelength of 13.5nm, could be used, and then the mirrors would need to be even smaller.

Olaf Solgaard, a Stanford-based researcher, is expected to discuss his ideas for making the mirrors at the SRC/Darpa workshop. And Tim Brunner, an IBM researcher, will represent the needs of the device makers. The SRC membership includes 11 semiconductor manufacturers. Companies such as LSI Logic and other ASIC manufacturers are eager to find a solution to rising mask costs, Gillespie said.

SRC member companies will meet during the week with SRC officials and Darpa representatives, largely to discuss the effort to develop a demonstration vehicle for mirror-based maskless lithography. One issue sure to be discussed is how to bring in the work being done in Europe.

"I would hope that we could draw on the best available work" for the demonstration vehicle, Gillespie said. Jorge Freyer from Micronic and Noreen Harned from ASML's Wilton, Conn., facility are scheduled to discuss the ASML-Micronic effort, she noted.

- David Lammers

EE Times